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  ceramic capacitors super low distortion multilayer ceramic capacitors (cfcap(tm)) LMK212SD473KD-T features item summary 10v, 0.047f, 10%, 0805 lifecycle stage mass production standard packaging quantity (minimum) taping paper 4000pcs products characteristics table casesize (eia/jis) 0805/2012 rated voltage (max) 10v capacitance 0.047f capacitance tolerance 10% resistance 10,000 m min. dielectric loss tangent 0.1%max temperature range (eia/jis) -55 to +125/-55 to +125 rohs compliance yes halogen free yes soldering method reflow external dimensions l 2.0mm 0.10 w 1.25mm 0.10 t 0.85mm 0.10 e 0.5mm 0.25 2015.01.05 powered by tcpdf (www.tcpdf.org) 1 / 1 spec sheet http://www.ty-top.com t h e d a t a i s r e f e r e n c e o n l y . e l e c t r i c a l c h a r a c t e r i s t i c s v a r y d e p e n d i n g o n e n v i r o n m e n t o r m e a s u r e m e n t c o n d i t i o n . t a i y o y u d e n r e s e r v e s t h e r i g h t t o m a ke c h a n g e t o t h e d a t e a t a n y t i m e w i t h o u t n o t i c e . b e f o r e m a k i n g f i n a l s e l e c t i o n , p l e a s e c h e c k p r o d u c t s p e c i f i c a t i o n . multi layer ceramic capacitor -electrical characteristics data- jun-2011 rohs compliance product lmk212sd473kd 10v 2012 0.047uf +/-10% t=0.95mmmax 10v 0805 0.047uf +/-10% t=0.037inchmax lmk212sd473kd capcitance temp. -20 -10 0 10 -55 -35 -15 5 25 45 65 85 105 125 temperature[degreec] dc/c[%] ??Ohy?????`??H?gHu??? ?`?????`o???????H?{? _J? the data is reference only. electrical characteristics vary depending on environment or measurement condition. taiyo yuden reserves the right to make change to the date at any time without notice. before making final selection, please check product specification lmk212sd473kd impedance,esr freq. 0.001 0.01 0.1 1 10 100 1000 0.1 1 10 100 1000 10000 frequency[mhz] z,esr[ohm] . esr z lmk212sd473kd capacitance freq. 0.001 0.01 0.1 1 0.1 1 10 100 1000 10000 frequency[mhz] capacitance[uf] . lmk212sd473kd dc bias char. -10 -8 -6 -4 -2 0 2 0246810 dc bias voltage[v] dc/c[%] .
ceramic capacitors super low distortion multilayer ceramic capacitors (cfcap(tm)) LMK212SD473KD-T features item summary 10v, 0.047f, 10%, 0805 lifecycle stage mass production standard packaging quantity (minimum) taping paper 4000pcs products characteristics table casesize (eia/jis) 0805/2012 rated voltage (max) 10v capacitance 0.047f capacitance tolerance 10% resistance 10,000 m min. dielectric loss tangent 0.1%max temperature range (eia/jis) -55 to +125/-55 to +125 rohs compliance yes halogen free yes soldering method reflow external dimensions l 2.0mm 0.10 w 1.25mm 0.10 t 0.85mm 0.10 e 0.5mm 0.25 2015.01.05 powered by tcpdf (www.tcpdf.org) 1 / 1 spec sheet http://www.ty-top.com t h e d a t a i s r e f e r e n c e o n l y . e l e c t r i c a l c h a r a c t e r i s t i c s v a r y d e p e n d i n g o n e n v i r o n m e n t o r m e a s u r e m e n t c o n d i t i o n . t a i y o y u d e n r e s e r v e s t h e r i g h t t o m a ke c h a n g e t o t h e d a t e a t a n y t i m e w i t h o u t n o t i c e . b e f o r e m a k i n g f i n a l s e l e c t i o n , p l e a s e c h e c k p r o d u c t s p e c i f i c a t i o n . multi layer ceramic capacitor -electrical characteristics data- jun-2011 rohs compliance product lmk212sd473kd 10v 2012 0.047uf +/-10% t=0.95mmmax 10v 0805 0.047uf +/-10% t=0.037inchmax lmk212sd473kd capcitance temp. -20 -10 0 10 -55 -35 -15 5 25 45 65 85 105 125 temperature[degreec] dc/c[%] ??Ohy?????`??H?gHu??? ?`?????`o???????H?{? _J? the data is reference only. electrical characteristics vary depending on environment or measurement condition. taiyo yuden reserves the right to make change to the date at any time without notice. before making final selection, please check product specification lmk212sd473kd impedance,esr freq. 0.001 0.01 0.1 1 10 100 1000 0.1 1 10 100 1000 10000 frequency[mhz] z,esr[ohm] . esr z lmk212sd473kd capacitance freq. 0.001 0.01 0.1 1 0.1 1 10 100 1000 10000 frequency[mhz] capacitance[uf] . lmk212sd473kd dc bias char. -10 -8 -6 -4 -2 0 2 0246810 dc bias voltage[v] dc/c[%] .


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